| US 7,430,140 B1 | ||
| Method and device for improved data valid window in response to temperature variation | ||
| Ritesh Mastipuram, Santa Clara, Calif. (US); Rajesh Manapat, San Jose, Calif. (US); and Chor Fung Chia, Fremont, Calif. (US) | ||
| Assigned to Cypress Semiconductor Corporation, San Jose, Calif. (US) | ||
| Filed on Sep. 23, 2005, as Appl. No. 11/234,647. | ||
| Claims priority of provisional application 60/613101, filed on Sep. 24, 2004. | ||
| Int. Cl. G11C 7/00 (2006.01) | ||
| U.S. Cl. 365—189.17 [365/194; 365/211; 327/176] | 20 Claims |
| 1. A method of accessing data stored in a semiconductor memory having a multi-stage input-output (I/O) buffer and a temperature
compensated circuit, the method comprising steps of:
sampling a temperature of the memory; and
switching a number of delay elements in the I/O buffer into a data path situated between the memory and an output in response
to the sampled temperature to output from the I/O buffer a data signal having a substantially constant data valid window (DVW)
relative to a timing signal over variations in the temperature of the memory.
|