| US 7,429,772 B2 | ||
| Technique for stable processing of thin/fragile substrates | ||
| Robin Wilson, Newtownards (Ireland); Conor Brogan, Belfast (Ireland); Hugh J. Griffin, Newtownabbey (Ireland); and Cormac MacNamara, Belfast (Ireland) | ||
| Assigned to Icemos Technology Corporation, Tempe, Ariz. (US) | ||
| Filed on Apr. 27, 2006, as Appl. No. 11/380,457. | ||
| Prior Publication US 2007/0262378 A1, Nov. 15, 2007 | ||
| Int. Cl. H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01) | ||
| U.S. Cl. 257—347 [257/E29.287] | 9 Claims |
| 1. A semiconductor on insulator (SOI) wafer comprising:
a semiconductor substrate having first and second main surfaces opposite to each other;
a dielectric layer disposed on at least a portion of the first main surface of the semiconductor substrate;
a device layer having a first main surface and a second main surface, the second main surface of the device layer being disposed
on a surface of the dielectric layer opposite to the semiconductor substrate;
a plurality of die areas defined on the first main surface of the device layer, the plurality of die areas being separated
from one another; and
a plurality of die access trenches formed in the semiconductor substrate from the second main surface, each of the plurality
of die access trenches having a width dimension and a height dimension defining an area, each of the areas of the plurality
of die access trenches defining at least a respective one of the plurality of die areas on the first main surface of the device
layer.
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