	US 7,371,644 B2
	Semiconductor device and method of fabricating the same
Atsushi Yagishita, Yokohama (Japan); Akio Kaneko, Kawasaki (Japan); and Kazunari Ishimaru, Yokohama (Japan)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan)
Filed on Apr. 17, 2006, as Appl. No. 11/404,772.
Claims priority of application No. 2005-164210 (JP), filed on Jun. 03, 2005.
Prior Publication US 2006/0275988 A1, Dec. 07, 2006
Int. Cl. H01L 21/336 (2006.01)

U.S. Cl. 438—268 [438/270; 257/E27.057]

5 Claims

1. A semiconductor device fabrication method, comprising:

depositing a mask material on a semiconductor substrate;

patterning the mask material and forming a trench in a surface portion of the semiconductor substrate by etching, thereby forming a first projection in a first region, and a second projection wider than the first projection in a second region;

burying a device isolation insulating film in the trench;

etching away a predetermined amount of the device isolation insulating film formed in the first region;

etching away the mask material formed in the second region;

forming a first gate insulating film on a pair of opposing side surfaces of the first projection, and a second gate insulating film on an upper surface of the second projection;

depositing a first gate electrode material on the device isolation insulating film, mask material, and second gate insulating film;

planarizing the first gate electrode material by using as stoppers the mask material formed in the first region and the device isolation insulating film formed in the second region;

depositing a second gate electrode material on the mask material, first gate electrode material, and device isolation insulating film; and

patterning the first and second gate electrode materials, thereby forming a first gate electrode in the first region, and a second gate electrode in the second region.